The present invention relates to a semiconductor device, and more specifically, to a method for forming an isolation layer in a semiconductor device, which can prevent attacks on a liner nitride layer in the course of forming an isolation layer.
In recent trends toward high-integration and fine-pattern of semiconductor memory devices such as dynamic random access memory (DRAM) devices, there has been increased the importance of a shallow trench isolation (STI) layer that exhibits a superior device isolation performance with a small width. It is known that the shallow trench isolation layer has an effect on the characteristics of DRAM devices, for example, a data retention time. In particular, a liner nitride layer is applied to the trench isolation layer, to improve the refresh characteristics of DRAM devices.
It will be appreciated that a method for forming a trench isolation layer comprises: forming a trench in a semiconductor substrate by a predetermined depth; forming a buffer layer, a liner nitride layer, and a liner oxide layer on a sidewall of the trench; and depositing an insulating layer to fill the trench.
The insulating layer to fill the trench is formed by repeating deposition-etching-deposition (DED), for the purpose of improving gap-fill characteristics. With the repetition of deposition and etching, overhangs, which are generated in the upper region of the trench in the course of depositing the insulating layer in the trench having a small width, can be removed by etching, thus resulting in an enhancement in the gap-fill characteristics of the trench. However, the repetition of deposition and etching has a limit to fill a trench having a low gap-fill margin due to the reduced size thereof.
FIG. 1 is illustrating defects in a trench isolation layer according to the prior art.
Referring to FIG. 1, it can be appreciated that, if a portion of the trench is exposed by etching that is carried out to remove overhangs generated during deposition of an insulating layer, a liner nitride layer on the exposed portion (as designated by the dotted circle A) of the trench is attacked by an etching solution. If the liner nitride layer is attacked, the liner nitride layer has defects such as pin holes, and the density of the liner nitride layer may be changed loosely.
The liner nitride layer having the loosely changed density cannot completely protect a semiconductor substrate from an oxidant source during the following oxidation process. Thereby, an unwanted oxidized portion further occurs in the semiconductor substrate by the oxidant source. The oxidized portion causes a stress during the fabrication of a device, and consequently may cause the leakage of current and a reduction of data retention time. Further, the liner nitride layer having the loosely changed density has a problem that impurities inside an active region may leak out in the following thermal process, to thereby be diffused into the isolation layer. If the diffusion of impurities into the isolation layer occurs, a cell threshold voltage (Vth) is changed, therefore the electric characteristics of a transistor may be deteriorated.